Power Wall+ Memory Wall + ILP (Instruction level parallelism) Wall= Brick Wall
There are two ways to scale speed by a factor x. Scale the number of (running) cores by x Power will scale by the same factor x
Scale the clock frequency f and voltage V by x Dynamic power will scale by x to the power 3 (CV2f ) Static power will scale by x (Vileakage) Total power lies somewhere in between
Clock scaling is worse when x > 1
This is part of the reason times are changing! Clock scaling is better when x < 1
Moral: If your multiprocessor is fully used but too hot, scale down voltage and frequency rather than processors
Parallel computing is necessary to save power.
- From Wikipedia: Since computer manufacturers have long implemented symmetric multiprocessing (SMP) designs using discrete CPUs, the issues regarding implementing multi-core processor architecture and supporting it with software are well known.Additionally:Utilizing a proven processing-core design without architectural changes reduces design risk significantly. For general-purpose processors, much of the motivation for multi-core processors comes from greatly diminished gains in processor performance from increasing the operating frequency. This is due to three primary factors: The memory wall; the increasing gap between processor and memory speeds. This effect pushes cache sizes larger in order to mask the latency of memory. This helps only to the extent that memory bandwidth is not the bottleneck in performance.The ILP wall; the increasing difficulty of finding enough parallelism in a single instructions stream to keep a high-performance single-core processor busy.The power wall; the trend of consuming exponentially increasing power with each factorial increase of operating frequency. This increase can be mitigated by “shrinking” the processor by using smaller traces for the same logic. The power wall poses manufacturing, system design and deployment problems that have not been justified in the face of the diminished gains in performance due to the memory wall and ILP wall.
- In order to continue delivering regular performance improvements for general-purpose processors, manufacturers such as Intel and AMD have turned to multi-core designs, sacrificing lower manufacturing-costs for higher performance in some applications and systems. Multi-core architectures are being developed, but so are the alternatives. An especially strong contender for established markets is the further integration of peripheral functions into the chip.
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Power Wall+Memory Wall+ILP (Instruction level parallelism) Wall= Brick Wall